A Modeling Approach of Spatially Distributed Defects in a Semiconductor Manufacturing

• 영문명: A Modeling Approach of Spatially Distributed Defects in a Semiconductor Manufacturing
• 발행기관: 한국산업경영시스템학회
• 저자명: Suk Joo Bae In-Jae Jeong Chang Wook Kang
• 간행물 정보: 『한국산업경영시스템학회 학술대회』2005년 춘계학술대회 논문집, 107~111쪽, 전체 5쪽
• 주제분류: 공학 > 산업공학
• 파일형태: PDF
• 발행일자: 2005.05.01

영문 초록

  The need for accurate yield prediction is increasing for estimating productivity and production costs to secure high revenues in the semiconductor industry. Corresponding to this end, we introduce new spatial modeling approaches for spatially clustered defects on an integrated circuit (IC) wafer map. We use spatial location of an IC chip on the wafer as a covariate on corresponding defects count listed in a wafer map. Analysis results indicate that yield prediction can be greatly improved by capturing spatial features of defects. Tyagi and Bayoumi"s (1994) wafer map data are used to illustrate the procedure.

목차

Abstract
1. INTRODUCTION
2. SPATIAL MODELING OF DEFECTS ON A WAFER MAP
3. ZERO-INFLATED POISSON REGRESSION MODEL
4. PRACTICAL EXAMPLE
5. CONCLUSION
REFERENCE

키워드

Integrated Circuits(ICs) Spatial clustering Zero-inflated Poisson(ZIP) regression Yield