신호지연이 화소 전압에 미치는 영향

• 영문명: Line Signal D elay E ffect on L evel Shift of Pixel V oltage
• 발행기관: 호서대학교 공업기술연구소
• 저자명: 유진태(Daniel J.T Yuh)배병성(Byung-Seong Bae)
• 간행물 정보: 『공업기술연구 논문집』제26권 제1호, 71~75쪽, 전체 5쪽
• 주제분류: 공학 > 공학일반
• 파일형태: PDF
• 발행일자: 2007.06.30

영문 초록

For the highest display quality in the large thin film transistor liquid crystal displays (TFT LCDs), we should improve the flicker characteristics. One of the problems accompanying the large TFT LCDs is that there is Gate/Data signal delay caused by increase of the resistance and the parasitic capacitance of each long signal line. In this paper, level shift of pixel voltage mainly causing flicker in the large TFT LCDs was investigated. A gate and data delay effect on level shift of pixel voltage, and an aspect of variations of level shift of pixel voltage according to the gate and data signal schematic was evaluated.

목차

i ■ 서 른

II. 모사 설계

m . 신호의 경사면 기울기

IV. Timing control 범위

V. 결론

키워드

TFT LCD Flicker Level shift Pixel voltage Signal delay