STI 채널 모서리에서 발생하는 MOSFET의 험프 특성

• 영문명: The MOSFET Hump Characteristics Occurring at STI Channel Edge
• 발행기관: 한국시뮬레이션학회
• 저자명: 김현호(Kim Hyun-Ho) 이천희(Yi CHEON-HEE)
• 간행물 정보: 『한국시뮬레이션학회 논문지』제11권 제1호, 23~30쪽, 전체 8쪽
• 주제분류: 공학 > 기타공학
• 파일형태: PDF
• 발행일자: 2002.03.30

영문 초록

An STI(Shallow Trench Isolation) by using a CMP(Chemical Mechanical Polishing) process has been one of the key issues in the device isolation[1]. In this paper we fabricated N, P-MOSFET to analyze hump characteristics in various rounding oxidation thickness(ex : Skip, 500, 800, 1000Å). As a result we found that hump occurred at STI channel edge region by field oxide recess, and boron segregation(early turn on due to boron segregation at channel edge). Therefore we improved that hump occurrence by increased oxidation thickness, and control field oxide recess(≤20nm), wet oxidation etch time(19HF, 30sec), STI nitride wet cleaning time(99HF, 60sec+P 90min) and gate pre-oxidation cleaning time (U10min+19HF, 60sec) to prevent hump occurring at STI channel edge.

목차

I. Introduction

II. Experimental

III. Results and Discussions

IV. Conclusions

References