선형 면적-시간 복잡도를 가지는 고성능 정렬기의 설계

• 영문명: Implementation of High-Performance Sorting Machine with Linear Area-Time Complexity
• 발행기관: 한국산업기술융합학회(구. 산업기술교육훈련학회)
• 저자명: 이태욱(Tae Wook Lee)
• 간행물 정보: 『산업기술연구논문지』산업기술연구논문지 제23권 3호, 1~9쪽, 전체 9쪽
• 주제분류: 공학 > 공학일반
• 파일형태: PDF
• 발행일자: 2018.09.30

영문 초록

Sorting arbitrarily ordered data is one of the most important and widely used task in digital signal and data processing applications. The conventional sorting algorithms used in such applications are mostly based on word-level sorting. As such, the area-time complexity increasesnon linearly with increase in the number of inputs, and the performance of the sorting machine deteriorates correspondingly. In this paper, we propose a new and efficient sorting algorithm based on bit-level sorting method. The hardware implementation of this algorithm results in a compact and modular sorting engine architecture capable of processing large number of inputs in linear time. The algorithm was created using Very High Speed Integrated Circuit Hard ware Description Language and graphical environment in MAX+PlusII of Altera. The simulation results, obtained using 970 logic cells, indicate that the operating frequency of the proposed circuit is 24.21MHz.

목차

ABSTRACT

Ⅰ. 서론

Ⅱ. 기존의 워드 레벨 정렬 알고리즘

Ⅲ. 제안된 비트 시리얼 정렬 알고리즘

Ⅳ. 알고리즘의 하드웨어 구현

Ⅴ. 시뮬레이션

Ⅵ. 결론

참고문헌

키워드

면적-시간복잡도 정렬알고리즘 정렬기 비트레벨정렬 메디언필터 Area-Time Complexity Sorting Algorithm Sorting Machine Bit-Level Sorting Median Filter